Bitrate reduction method and circuitry

专利名称：Bitrate reduction method and circuitry发明人：VOGEL, PETER, DIPL.ING.申请号：EP87201717.3申请日：19870910公开号：EP0260748B1公开日：19940713

摘要：The method is intended especially for video signals in which so- calledcoefficient blocks occur as an intermediate signal. The majority of the signal valuesbelonging to a coefficient block - also referred to as coefficients - are 0. For this reason,an uninterrupted sub-string of zeroes is combined with the subsequent coefficient toform an event, provided that the length of the sub-string of zeroes remains below amaximum value. Once the maximum value has been reached, this maximum sub-string ofzeroes, along with the subsequent coefficient, is regarded as an event and subsequentcoefficients are combined to form further events. A Huffmann code word is allocated toeach event for transmission purposes. To form events from the coefficient string, thecoefficients are fed via an input line (e) to a comparator circuit (K) and to the addressinputs of a memory (PROM). The count of a counter (Z) is supplied to further addressinputs of the memory (PROM) and also to the comparator (K). If a coefficient on the inputline (e) is 0, the comparator sends a counting pulse to the counter (Z), provided that amaximum count has not yet been reached. If the coefficient at the input (E1) of thecomparator (K) has a non-zero value, or the maximum count has been reached, thecomparator (K) sends a reset pulse to the counter (Z), with which the code word

occurring at the memory (PROM) is simultaneously transferred into a flip-flop circuit (FF).

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申请人：PHILIPS PATENTVERWALTUNG GMBH,PHILIPS

PATENTVERWALTUNG,PHILIPS PATENTVERWALTUNG GMBH,N.V. PHILIPS'GLOEILAMPENFABRIEKEN,PHILIPS NV,N.V. PHILIPS' GLOEILAMPENFABRIEKEN

地址：DE,NL

国籍：DE,NL

代理机构：Peuckert, Hermann, Dipl.-Ing.

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